1. Field of the Invention
The invention relates to a high speed, high voltage linear amplifier which can be built with IC technology, having two low voltage circuits in a silicon die which float with respect to each other. The IC structure can advantageously be used as the gate driver IC for a motor inverter circuit.
The invention relates more particularly to a gate driver IC which includes a CT-less active EMI filter for noise reduction in high voltage and high speed applications.
2. Related Art
FIGS. 1A and 1B are a schematic diagram showing a discrete implementation of an active filter for EMI reduction. A feature of the active filter is that it does not require an inductive current sensing device such as a current transformer (CT).
The active filter has a voltage input instead of a current sensing device to capture the common mode noise current to be canceled. Instead of current sensing as in earlier designs, an error amplifier senses the voltage difference between one of the AC lines and ground. The amplifier has a certain amount of impedance, which induces a voltage due to the noise current. The error amplifier creates a canceling current by amplifying the voltage difference between the line and ground. The canceling current is supplied to the ground line to compensate for the common mode noise current.
The error amplifier 10 is referenced to one of the AC line potentials via the REF and COM terminals, namely to the NEUTRAL line in this embodiment. Therefore, the noise voltage sensing can be done via a Y-capacitor C17 connected to ground and to a terminal VFB.
The common node noise current Icomnoise is generated by motor windings and driver circuitry. The amplifier 10 amplifies the noise voltage with negative polarity. The injection current is then supplied to the ground return line by a Y-capacitor C16 between the output OUT of the amplifier 10 and ground. The canceling current is injected by this capacitor C16, which differentiates the output voltage of the amplifier with respect to the current.
The error amplifier 10 has at least two inputs, non-inverting and inverting inputs (see below), and one output.
The non-inverting input #1, the node between the bases of Q11 and Q14, senses the noise voltage potential on the GROUND line via a Y-graded capacitor C17.
An inverting input, input #3, the node between the emitters of Q9 and Q18, also senses the noise voltage potential on the GROUND line. This inverting input is connected to ground via a Y-graded capacitor C18.
An output OUT of the amplifier is connected to ground via the Y-graded capacitor C16 and leads the canceling current from the output OUT to ground, and also feeds back the output OUT to the inverting input #2, which in this embodiment is the same node as input #3, namely the node between the emitters of Q9 and Q18.
In order to avoid unintentional instability of the amplifier induced by the line impedance and to absorb a large amplitude of 60 Hz common mode voltage, there are several important considerations when doing active cancellation, for which this proposed topology features the following internal structures:                To get high input impedance, the amplifier 10 has a high impedance voltage input #1, which is the node of the bases of Q11 and Q14. High input impedance is important in order to be able to use a small capacitance for C17. This is important for common mode cancellation because it limits the total Y capacitance value needed.        To maintain the output voltage at the middle of the supply rail, the amplifier has a second input #2 that has low input impedance and receives the error signal from the output OUT in current form. The second input is the node of the emitters of Q9 and Q18. This middle point voltage maintenance is important so that the output stage of the amplifier may have maximum headroom for the next current injection.        To obtain higher frequency response and to avoid a gain-bandwidth tradeoff and slew rate limiting, the amplifier has a third input #3 that has low impedance and inputs the error signal in current form from the ground line via Y-capacitor C18 and terminal CFB. To avoid the drawbacks of the current input structure, this third input is effective mainly in the higher frequency range. The third input, like the second input in this embodiment, is the node between the emitters of Q9 and Q18. This function is effective for improving bandwidth; however, if desired, the amplifier could serve its purpose without this input.        The amplifier has a main gain stage of a transresistance amplifier 40 followed by a buffer amplifier 50 which reinforces output current capacity. The transresistance amplifier 40 includes a current mirror circuit, Q1, Q2, Q3, Q23, Q24, Q25, and resistors R36 and R37. The buffer amplifier 50 includes Q7, Q19, Q8, and Q16 in FIGS. 1A and 1B.        Bus voltage for the amplifier 10 is provided from the LIVE line via a terminal VBUS.        In order to avoid the influence of a large 60 Hz common mode voltage signal, the amplifier has a high pass filter function 30 in the front end of the first voltage input. This filter comprises C17, R29, C12, and R30 in FIGS. 1A and 1B. This function enables the amplifier to detect and cancel several 10's of mV of high frequency noise, as compared to hundreds of volts of 60 Hz.        
An RF receiver 20 or any equivalent device can be provided for sensing common mode noise and/or to test the operation of the disclosed circuit.
Other aspects of the circuit of FIGS. 1A and 1B including the active filter are described in Ser. No. 10/860,755 filed Jun. 2, 2004 (IR-2483), incorporated by reference.